Hardware Complexity Tool (hct) is now available for Fedora. It generates scores that represent the complexity of the modules of integrated circuit design projects. It uses McCabes’ cyclomatic complexity for understanding branch complexity. You can run hct on verilog, vhdl, cdl (computer design language) files or directories that contain these files. For example:

~~~~ {.shell} $ hct verilog Directory: /tmp/verilog

verilog, 18 file(s) +——————–+————–+——+——-+———-+——–+ | FILENAME | MODULE | IO | NET | MCCABE | TIME | +——————–+————–+——+——-+———-+——–+ | Case.v 0 0 18 0.1504 | | case 0 0 18 | +———————————————————————-+ | modules.v 1 0 2 0.0137 | | m1 1 0 1 | | m2 0 0 1 | +———————————————————————-+ | RAM.v 7 0 4 0.1653 | | RAM 7 0 4 | +———————————————————————-+ | hello_world.v 0 0 1 0.0113 | | hello_world 0 0 1 | +———————————————————————-+ | one_day2.v 0 0 2 0.0423 | | one_day2 0 0 2 | +———————————————————————-+ | S430.v 13 4 1 0.2438 | | S430 13 4 1 | +———————————————————————-+ | one_day3.v 0 0 4 0.0305 | | one_day3 0 0 4 | +———————————————————————-+ | first_counter.v 4 3 3 0.0765 | | first~unter 4 3 3 | +———————————————————————-+ | Multiplier.v 7 4 1 0.1646 | | Multiplier 7 4 1 | +———————————————————————-+ | Sys430.v 10 12 9 0.5017 | | Sys430 3 12 5 | | LEDTest 7 0 4 | +———————————————————————-+ | first_counter_tb.v 0 1 1 0.0279 | | first~er_tb 0 1 1 | +———————————————————————-+ | longtest.v 9 5 12 2.1130 | | RAMB16_S9 9 5 12 | +———————————————————————-+ | GPR.v 8 0 3 0.1039 | | GPR 8 0 3 | +———————————————————————-+ | encoder_u~g_case.v 3 0 16 0.1384 | | encode~_case 3 0 16 | +———————————————————————-+ | RAMB16_S9.v 9 5 12 2.0922 | | RAMB16_S9 9 5 12 | +———————————————————————-+ | comment.v 0 0 1 0.0264 | | comment 0 0 1 | +———————————————————————-+ | encoder_using_if.v 3 0 17 0.1941 | | encode~ng_if 3 0 17 | +———————————————————————-+ | MUX2.v 0 0 1 0.0035 | | INV 0 0 1 | +———————————————————————-+ ~~~~